In November, Intel showed its supercomputer ambitions with the Ponte Vecchio, a 7nm GPU based on the Intel Xe architecture. Now, according to its registration with the EEC, Intel's first datacenter graphics card is available in pre-alpha version, ahead of a 2021 release.

The Ponte Vecchio RVP (Reference Validation Platform) GPU is powered by Intel Xe, OneAPI, and Sapphire Rapids Xeon CPUs, a far cry from the Xe chip that will be installed in the US Department of Energy's Aurora supercomputer in 2021. It is likely to be a far cry from this. We cannot yet say what state Ponte Vecchio is in. All we know is that Intel is reportedly working up to a "V5" version of this GPU and that it will be offered in a familiar form factor as an add-in card.

The EEC lists three variants of the Ponte Vecchio RVP AIC card: the GAPV3KI2TC, GAPV4KI2TC, and GAPV5KE2TC; the GAPV3KI2TC, GAPV4KI2TC, and GAPV5KE2TC; and the GAPV4KI2TC, GAPV5KE2TC, and GAPV5KE2TC.

At the core of Ponte Vecchio is a comprehensive graphics architecture, Intel Xe, which will be premiered later this year in Tiger Lake chips and possibly discrete GPUs.

However, Pontevecchio differs from these consumer parts in several ways. For one, it is built using the full-fat Intel Xe-HPC architecture, as opposed to a subset of the Xe-HP and Xe-LP architectures for professional and gaming applications. It is dedicated to modeling, simulation, and AI workloads.

Also, Intel Tiger Lake and its peers are planned for the 10nm process node, while Ponte Vecchio will come in at 7nm. It will also incorporate many of Intel's development technologies, including Foveros 3D, EMIB packaging technology, and CXL-based Xe Link interconnect.

Clearly, Intel has set high goals for Intel Xe and has taken it upon itself to bring together a set of largely untried and untested technologies into a single product, and to do so in a short period of time. But whatever state Ponte Vecchio is currently in, these pre-alpha cards are a sign of movement from the Xe graphics team after a quiet post-CES patch.